1. Field of the Invention
The present invention relates to thin films suitable as dielectrics in integrated circuits (IC's) and for other similar applications. In particular, the invention concerns a process and curing method for thin films comprising polymer compositions of organic, inorganic or organic-inorganic materials.
2. Description of Related Art
Built on a semiconducting substrate, integrated circuits comprise millions of transistors and other devices, which communicate electrically with one another and outside packaging material through multiple levels of vertical and horizontal wiring embedded in a dielectric material. Within the multilayer metallization structure, “vias” comprise the vertical wiring, whereas “interconnects” comprise the horizontal wiring. Fabricating the metallization can involve the successive depositing and patterning of multiple layers of dielectric and metal to achieve electrical connection among transistors and to outside packaging material. The patterning for a given layer is often performed by a multi-step process consisting of layer deposition, photoresist spin, photoresist exposure, photoresist develop, layer etch, and photoresist removal on a substrate. Alternatively, the metal may sometimes be patterned by first etching patterns into a dielectric, filling the pattern with metal, then subsequently chemical mechanical polishing the metal so that the metal remains embedded only in the openings of the dielectric. As an interconnect material, aluminum has been utilized for many years due to its high conductivity, good adhesion to SiO2, known processing methods (sputtering and etching) (and low cost). Aluminum alloys have also been developed over the years to improve the melting point, diffusion, electromigration and other qualities as compared to pure aluminum. Spanning successive layers of aluminum, tungsten has traditionally served as the conductive via plug material. Silicon dioxide (dielectric constant of around 4.0) has been the dielectric of choice, used in conjunction with aluminum-based and tungsten-based interconnects and via for many years.
The drive to faster microprocessors and more powerful electronic devices in recent years has resulted in very high circuit densities and faster operating speeds, which in turn have required higher conductivity metals and lower-k dielectrics (preferably below 3.0, more preferably below 2.5 dielectric constant). In the past few years, VLSI (and ULSI) processes have been moving to copper damascene processes, where copper (or a copper alloy) is used for the higher conductance in the conductor lines and a spin-on or CVD process is used for producing low-k dielectrics which can be employed for the insulating material surrounding the conductor lines. To circumvent problems with etching, copper along with a barrier metal is blanket deposited over recessed dielectric structures consisting of interconnect and via openings and subsequently polished in a processing method known as the “dual damascene.” The bottom of the via opening is usually the top of an interconnect from the previous metal layer or, in some instances, the contacting layer to the substrate.
In addition to being photopatternable, the dielectric IC material should be easy to deposit or form, preferably at a high deposition rate and at a relatively low temperature. Once the material has been deposited or formed, it should also be readily patterned, and preferably patterned with small feature sizes if needed. The patterned material should preferably have low surface and/or sidewall roughness. It might also desirable that such materials be hydrophobic to limit uptake of moisture (or other fluids), and be stable with a relatively high glass transition temperature (not degrade or otherwise physically and/or chemically change upon further processing or when in use).
Summarizing: aside from possessing a low dielectric constant, the ideal dielectric should have the following properties:    1. High modulus and hardness in order to bind the maze of metal interconnects and vias together as well as abet chemical mechanical polishing processing steps.    2. Low thermal expansion, typically less than or equal to that of metal interconnects.    3. Excellent thermal stability, generally in excess of 400° C.    4. No cracking, excellent fill and planarization properties    5. Excellent adhesion to dielectric, semiconductor, and metal materials.    6. Sufficient thermal conductivity to dissipate joule heating from interconnects and vias.    7. Material density that precludes absorption of solvents, moisture, or reactive gasses.    8. Allows desired etch profiles at very small dimensions.    9. Low current leakage, high breakdown voltages, and low loss-tangents.    10. Stable interfaces between the dielectric and contacting materials.
By necessity, low-k materials are usually engineered on the basis of compromises. Silicate-based low-k materials can demonstrate exceptional thermal stability and usable modulus but can be plagued by brittleness and cracking. Organic materials, by contrast, often show improved material toughness, but at the expense of increased softness, lower thermal stability, and higher thermal expansion coefficients.
Porous materials sacrifice mechanical properties and possess a strong tendency of absorbing chemicals used in semiconductor fabrication leading to reliability failures. Furthermore these porous materials are mesoporous or microporous with pore diameters in excess of 2 nm and pore volumes greater than 30%. Fluorinated materials can induce corrosion of metal interconnects, rendering a chip inoperative. Generally, in low-k materials, mechanical robustness and thermal conductivity has been sacrificed as compared to their pure silicon dioxide analogues, making integration into the fabrication flow very challenging.
Further, known materials comprising exclusively inorganic bonds making up the siloxane matrix are brittle and have poor elasticity at high temperatures.
Organosiloxane materials are typically deposited via spin-on processing, however Chemical Vapor Deposition (CVD) is also a viable technique for—the deposition of these materials. For example, in the published International Patent Application No. WO 03/015129, organosilicone low-k dielectric precursors are described which are useful for producing porous, low-k dielectric, SiOC thin films, wherein the organosilicon precursor comprises at least one cleavable, organic functional group that upon activation rearranges, decomposes and/or cleaves as a highly volatile liquid and/or gaseous by-product. Other organosilicone precursors comprising Si—O—C-in-ring cyclic siloxane compounds for use as precursors for forming insulator films by CVD are described in U.S. Pat. No. 6,440,876. When these siloxane precursors are applied to the surface of a semiconductor or integrated circuit, they will react on the wafer surface forming a dielectric film. The ring opening polymerization of these cyclic compounds forms a dielectric film or layer that will have a k value between 2.0 and 2.5.
U.S. Pat. No. 6,242,339 discloses an interconnection structure, in which a phenyl group, bonded to a silicon atom, is introduced into silicon dioxide in the organic-containing silicon dioxide as a material for the interlevel insulating film. Such a film can be processed just as well as a conventional CVD oxide film, it has a relative dielectric constant as low as that of a hydrogen silsesquioxane (HSQ) film, and can adhere strongly to organic film, oxide film or metal film. According to the cited patent, the number of devices that can be integrated within a single semiconductor integrated circuit can be increased without modifying the conventional semiconductor device manufacturing process to provide a high-performance semiconductor integrated circuit, operative at a high speed and with lower power dissipation.
However, in spite of advantages achieved by using the known precursors, there are still disadvantages of the known methods of their manufacture.
First, the manufacture of these precursors is inefficient because the chemical reactions have low yields, and the processes are expensive and produce toxic byproducts. Further, it is difficult to eliminate redimerization of the reactive intermediates. When deposited along with polymers, these dimers decrease the thermal stability and mechanical strength of the film. Moreover, materials currently reaching a dielectric constant of less than 2.5 are typically highly porous, which makes the integration of such materials into the semiconductor device very difficult.
Thus, the prior art contains no examples of ways of processing dielectric material precursors for semiconductor manufacture to provide dielectric materials, which have desired properties of low dielectric constant with low controlled micro porosity, high thermal stability, and low cost.